http://dspace.nbuv.gov.ua:80/handle/123456789/111461 2026-04-17T16:30:31Z http://dspace.nbuv.gov.ua:80/handle/123456789/113745 Наши авторы 2016-01-01T00:00:00Z http://dspace.nbuv.gov.ua:80/handle/123456789/113381 Титульная страница и содержание 2016-01-01T00:00:00Z http://dspace.nbuv.gov.ua:80/handle/123456789/113333 Формализованные онтологические модели в научных исследованиях Крывый, С.Л. Рассмотрены проблемы, связанные с построением онтологий, тезаурусов и консенсуса в понимании интерпретации концептов предметной области, для которой строится такая онтология.; Розглянуто проблеми, пов’язані з побудовою онтологій, тезаурусів і консенсусу в розумінні інтерпретації концептів предмет ної області, для якої будується така онтологія.; In the paper consider some problems connected to building ontologies, thesauruses and achieving of consensus in understanding of interpretation of concepts from ontology for a given domain. In first part discusses of similarities and differences between ontologies and thesauruses. As a result of such discussion is the ontology and thesaurus mast complements to each other In second part of paper consider problems of knowledge consistency derived from natural language text or another sources of information. For knowledge presentation are used corresponding predicates or relations. The consistency problem of knowledge defines as constraint satisfaction problem over given domain D by using interpretation of concepts in this domain D. Consistence problem may be not solved over domain D, because some information is absences or set of predicates are inconsistency. This situations are discussed. In third part of paper considered set of functions and operations over ontologies. For representation of hierarchy of ontology’s concepts is used directed graph (more precisely hyper graph). These functions and operations are divided on set of functions and operations on graph and functions and operations of administrative character. In four part of paper such functions and operations are demonstrated by examples. In five part of paper is described same implementations of ontologies by using languages OWL, OWL2, RDF and so on. In conclusion the future of applications of ontologies are described. In special case the main attention give a role of ontologies in transdisciplinery sciences researches. 2016-01-01T00:00:00Z http://dspace.nbuv.gov.ua:80/handle/123456789/113332 Уменьшение числа LUT-элементов в схеме совмещенного автомата Баркалов, А.А.; Титаренко, Л.А.; Визор, Я.Е.; Матвиенко, А.В.; Горина, В.В. Предложен метод синтеза совмещенного микропрограммного автомата в базисе FPGA, позволяющий получить схему с минимальным числом элементов LUT и встроенных блоков памяти EMB. Минимизация достигается путем замены части множества логических условий и соответствующего кодирования состояний автомата. Приведен пример применения метода.; Запропоновано метод синтезу суміщеного мікропрограмного автомата в базисі FPGA, що дозволяє отримати схему з мініма льним числом елементів LUT і вбудованих блоків пам'яті EMB. Мінімізація досягається шляхом заміни частини множини логічних умов та відповідного кодування станів автомата. Наведено приклад застосування методу.; A method for synthesis of combined finite state machine (CFSM) with FPGA is proposed. An analysis of CFSM’s peculiarities is given. The main feature of CFSM is an existence of two types of the output signals. Mealy outputs depend on the both inputs and states. Moore outputs depend only on the states. The known methods of CFSM design and conditions for their application and the method of the logical conditions replacement is thoroughly analyzed. It allows using embedded memory locks (EMB) for implementing some part of CFSM circuit. It is shown that the situations are possible when not all address inputs of an EMB are used. The suggested method is based on using these free address inputs. It is proposed to connect a part of logical conditions with unused address inputs of EMB blocks. It allows diminishing for the number of look-up table (LUT) elements in the circuit of logical conditions replacement in comparison with known methods of CFSM design. It is proposed to replace some part of the logical conditions set by additional variables. A design method based on such partial replacement is proposed. The method allows obtaining a CFSM circuit with the minimum number of table elements LUTs and memory blocks EMBs. Some additional optimization are possible for the replacement block of the logical conditions due to a special state assignment. The main idea of the special state assignment is reduced the assignment neighbor codes for states with transitions depending on the same logical conditions. It allows diminishing the number of the literals in functions implemented of the block of the logical conditions replacement. An example of the studied method application is shown. The proposed method allows obtaining a circuit required minimum chip space and consuming minimum power in comparison with the known design methods. The conducted researches are based on some library of standard GSAs. The investigations show that for the majority of standard GSAs the proposed method produces the circuits with a single EMB. 2016-01-01T00:00:00Z